【 Features 】 |
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CPU |
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-Turbo 8052 CPU |
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-Each machine cycle consumes 3 system clocks. |
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-Instruction execution time: 0.1875μs(at 16MHz), 92μs (at 32.768 kHz) |
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-Program memory: 64K-byte Flash Memory |
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Data memory : 256B + 2KB SRAM |
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Totally 11 interrupt sources: 9 internal sources and 2 external sources. |
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8 wake-up keys (WAKE0 ~ WAKE7) with edge-selection, interrupt-selection, wakeup-from-power-down-mode functions |
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Input/output ports: |
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-69 pins for LQFP100 and DIE form, 44 of which are shared with LCD driver |
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-All GPIOs could be configured as 4 types: input with pull-up resistor, input without pull-up resistor, CMOS output and N-ch open-drain output. |
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3 sets 8052 standard 16-bit timer/counters: Timer 0, Timer 1 and Timer 2 |
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-Timer 0 could be used as: a 13-bit timer, a 16-bit timer, an 8-bit auto-reload timer, two 8-bit timers. |
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-Timer 1 could be used as: a 13-bit timer, a 16-bit timer, an 8-bit auto-reload timer. |
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-Timer 2 could be used as: a 16-bit auto-reload timer/counter, a 16-bit capture timer/counter, a UART baud rate generator for both receive and/or transmit. |
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1 set of 18-bit timer/counter: Timer 3 which can be used as timer, event counter, pulse width measurement, frequency measurement. |
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2 sets 12-bit PWM for signal generation |
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Time base timer with 8 interrupt sources |
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Watchdog timer with programmable detection time |
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Serial interface |
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-8052 standard UART: 1 channel |
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-SPI: Master/Slave modes, 1 channel |
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-Both UART and SPI could be from P35 ~ P37 or P75 ~ P77 by software selection |
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-I2C: Slave-mode-only, 1channel |
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2.5V and 1.25V regulator voltage outputs for applications |
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12-bit successive approximation type A/D converter |
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-VREF voltage could be internal (2.5V) or external VAREF pin. |
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-Analog input: 15 external and 4 internal channels |
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4 high-speed Operational Amplifier (OP1, OP2, OP3 and OP4) |
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-Power supply: from VREF (internal 2.5V or external VAREF pin) |
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-Input range: 0.05VREF ~ 0.95VREF |
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-Slew rate: 4.5V/us |
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-DC Gain=110dB, Unit-gain BW=7MHz |
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-Offset=2mV (max) |
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2 sets of analog switch for signals connection |
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LCD driver/controller |
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-LCD direct drive capability (Max 40seg x 4com) |
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-1/4, 1/3 or 1/2 duties are selectable by program. |
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-1/3 or 1/2 bias are selectable by program. |
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Power on reset (POR) |
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Single/dual-clock operation |
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-Single-clock mode: high-speed clock only. Clock source could be internal RC Oscillator (max.12MHz) or external crystal oscillator (max. 24MHz) |
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-Dual-clock mode: both high-speed clock low-speed clock are used. High-speed clock source could be internal RC Oscillator (max. 12MHz) or external crystal oscillator (max.24MHz). Low-speed clock source is external 32.768KHz crystal oscillator. |
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2 power saving operating modes (IDLE mode and POWER-DOWN mode) and many control bits for specified peripherals could be selected. |
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Operating voltage: |
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-DVDD = AVDD = 2.4 to 3.6V at 16 MHz / 32.768 kHz |
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-DVDD = AVDD = 2.7 to 3.6V at 24 MHz / 32.768 kHz |
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ICE (In-Circuit-Emulator) embedded |
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ISP (In-System-Programming) function by I2C interface |
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Package: LQFP100 |